Overview
The TMS9900 has a 16-bit data bus and a 16-bit address bus allowing it to access 64 KiB of memory.
The TMS9980 supports the same instruction set as the TMS9900 but has an 8-bit data bus and a 14-bit address bus allowing it to only access 16 KiB of memory.
CPU Registers
TI uses 0 to specify the most-significant bit
The TMS9900 is unusual in that it only has three registers internal to the CPU. The Program Counter (PC) register holds the address of the next instruction to be executed, the Workspace Pointer (WP) contains an address that points to a set of registers in memory referred to as a register file and the Status Register (ST) is used to store flags and an interrupt mask.
Register File
The workspace pointer contains an address for a continuous 16 word (32 byte) area of memory that is used to store 16 register values. Instead of using a stack, the TMS9900 instead swaps out WP values when operations are to be executed. the old WP and PC values are stored in specific registers in thew new register file.
| 0 15 |
| R0 |
| R1 |
| R2 |
| R3 |
| R4 |
| R5 |
| R6 |
| R7 |
| R8 |
| R9 |
| R10 |
| R11 |
| R12 |
| R13 |
| R14 |
| R15 |
The lower 4 bits of R0 are used for the shift count
R11 is used for the Effective Address with XOP instructions and the PC contents with BL instructions
R12 is used for the CRU Base Address
R13 is used to store previous WP register value
R14 is used to store previous PC register value
R15 is used to store previous ST register value
Status Register
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 11 | 12 15 |
| L> | A> | EQ | C | OV | OP | X | Reserved | Interrupt Mask |
Logical Greater than (L>)
The result of comparisons based treating values as unsigned numbers
Arithmetic Greater Than (A>)
The result of comparisons based on treating the values as signed two’s Complement numbers
Equal (EQ)
Set when the values being compared are equal
Carry (C)
Set by a carry-out of the most-significant bit during arithmetic operations. Also used by shift operations to store the value of the last bit shifted
Overflow (OV)
Set when the result of an arithmetic operation is too large or two small to be represented correctly.
Odd Parity (OP)
Set when the parity of a result is odd, cleared when the parity is even
Extended Operation (X)
Set when an extended operation (XOP instruction) is initiated
Reserved
Flags reserved for future use
Interrupt Mask
Used to get/set which interrupts are enabled
Input Output
Input and Output are handled by Communication Register Unit (CRU) instructions. These instructions provide a serial interface to devices by addressing individual bits in the device's address space